FCO-2P-PJ 0.8ps Jitter Prog Oscillator
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  • FCO-2P-PJ 0.8ps Jitter Prog Oscillator

FCO-2P-PJ 0.8ps Jitter Prog Oscillator

SMD 2.5×2.0mm, 0.8ps typ., 25~40mA


FEATURE

FCO-2P-PJ is a miniature programmable SMD oscillator with a 2.5×2.0mm package, offering ultra low power consumption and exceptional low jitter performance (typical 0.8ps RMS). Supporting frequency programming from 1MHz to 200MHz and compatible with 1.8V, 2.5V, and 3.3V voltage platforms, it is ideal for space-constrained, battery-powered applications such as wearables, IoT nodes, and portable consumer electronics.

Product Description

FCO-2P-PJ Ultra-Low Jitter Programmable Oscillator (2.5×2.0mm)

A compact, programmable CMOS clock source designed for platforms that demand clean timing in small footprints. Ideal for consumer and portable devices needing low RMS phase jitter, fast start-up, and stable operation across wide temperatures.

1–200MHz 0.8ps typ (12kHz–20MHz) 1.8V / 2.5V / 3.3V ≤8ms start-up

Test condition note: RMS phase jitter is specified over 12kHz to 20MHz; CMOS output measured with 15pF load.

FCO-2P-PJ programmable oscillator, ultra-low jitter, 2.5×2.0mm SMD package

Key Features

  • Frequency range: 1MHz ~ 200MHz
  • Operating voltages: 1.8V, 2.5V, 3.3V
  • Ultra-low RMS phase jitter: 0.8ps typ., 1.5ps max (12kHz~20MHz)
  • Fast start-up: ≤8ms
  • Tri-state enable/disable on Pin 1
  • Typical current: 25~40mA depending on frequency
  • Frequency stability up to ±20ppm (–40°C ~ +105°C)
  • CMOS output, 15pF load, 45%–55% duty cycle
  • 1st-year aging: ±3ppm

Key Specs

Quick summary (for engineering evaluation): jitter is integrated over 12kHz–20MHz; output is CMOS with 15pF load.

Frequency

1MHz to 200MHz

RMS Phase Jitter

0.8ps typ, 1.5ps max

Supply Voltage

1.8V / 2.5V / 3.3V

Package

2.5×2.0mm SMD

Detailed Specifications

Frequency range 1MHz to 200MHz (programmable)
Supply voltage 1.8V, 2.5V, 3.3V
RMS phase jitter 0.8ps typ, 1.5ps max (12kHz–20MHz)
Start-up time ≤8ms
Enable/disable Tri-state enable/disable on Pin 1
Current consumption 25–40mA typical (frequency dependent)
Frequency stability Up to ±20ppm (–40°C to +105°C)
Output CMOS, 15pF load, 45%–55% duty cycle
Aging ±3ppm (1st year)
Electrical specifications table for FCO-2P-PJ including current, jitter, voltage, duty cycle, startup
Electrical characteristics reference (table image).

Applications

Recommended Applications

  • Wearable and health monitoring devices
  • DSC, PDA, smart terminals
  • Set-top boxes, HDTVs
  • Computer peripherals and USB devices
  • Low-jitter clocks for consumer electronics

Why these specs matter in real products

  • Low RMS jitter helps preserve timing margin in high-speed serial interfaces and reduces intermittent system errors caused by noisy clocks.
  • Fast start-up supports aggressive power sequencing in portable devices (wake-on events, duty cycling, quick boot).
  • Wide-temperature stability maintains clock accuracy in outdoor, wearable, and consumer environments where temperature varies rapidly.

Package Dimension

Mechanical drawing and recommended land pattern for FCO-2P-PJ oscillator
Package outline and recommended land pattern.

Ordering Code / Options

Configurable options

  • Frequency point: choose any required frequency within 1MHz–200MHz
  • Output: CMOS (15pF load)
  • Supply: 1.8V / 2.5V / 3.3V
  • Package: 2.5×2.0mm SMD
  • Temperature grade: –40°C to +105°C (per stability requirement)

Ordering example (for RFQ)

Share the parameters below to match the correct configuration and screening:

  • Target frequency (MHz)
  • Supply voltage (V)
  • Operating temperature range
  • Jitter target and integration bandwidth
  • Packaging (tape & reel) and any test/report requirements

Selection Path / Upgrade Options

If your platform needs differential clocking (LVDS/LVPECL/HCSL) or PCIe-grade 100MHz clock profiles, compare these related products:

Downloads

Design Recommendations

To achieve optimal performance, place a 0.1μF bypass capacitor between Vdd and GND, as close as possible to the device. Ensure layout follows recommended PCB footprint for mechanical stability and low EMI.

Practical tip: keep the power loop small, avoid routing aggressive digital traces under the device, and confirm the load/measurement conditions used for jitter validation during system bring-up.

Family / Application / Knowledge Links

FAQ

Is pricing shown on the page?

No. This is a no-price listing. Please request an RFQ to receive a quote based on frequency, voltage, temperature grade, packaging, and test requirements.

What is the MOQ and lead time?

MOQ and lead time depend on configuration (frequency, voltage, and screening). Contact FCom Fuji Crystal for the latest MOQ/lead-time options for samples and mass production.

Can I get samples before mass production?

Yes. Samples are available for evaluation. Share your target frequency, voltage, temperature range, and jitter requirement to receive the right sample configuration.

Do you support customization (frequency/programming/screening)?

Yes. Custom frequency programming and screening options are supported. Provide your platform constraints and test conditions to confirm feasibility and deliverables.

What test conditions are used for the jitter specification?

RMS phase jitter is specified with an integration band of 12kHz to 20MHz (typ 0.8ps, max 1.5ps). Confirm any alternate integration bandwidth or phase-noise mask requirements with us.

For detailed datasheets or design support, visit www.fujicrystal.com or email us at FCom@fujicrystal.com.

Notes: Specifications and availability may vary by configuration and screening. For compliance documents, packaging options, and test reports, please contact FCom Fuji Crystal via the contact form.

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